Implementation of IEEE 802.16e MIMO–OFDMA systems with K-best lattice decoding algorithm. In Proceedings IEEE International Conference on Communications, Beijing, China (pp. Selective spanning with fast enumeration: A near maximum-likelihood MIMO detector designed for parallel programmable baseband architectures. Li, M., Bougart, B., Lopez, E., & Bourdoux, A. Achieving near-capacity on a multiple-antenna channel. IEEE Journal of Selected Topics in Signal Processing, 12(99), 1. Fixed- and floating-point arithmetic processor comparison for MIMO–OFDM detector. Janhunen, J., Pitkänen, T., Silvén, O., & Juntti, M. In Proceedings of European Signal Processing Conference. MIMO detection in single carrier systems. Ketonen, J., Karjalainen, J., Juntti, M., & Hänninen, T. Modified Gram–Schmidt algorithm is used in both QRD implementations. In addition to detector implementations, QRD is also implemented on both TTA and FPGA. A multiple-input multiple-output receiver requires QRD to produce valid inputs for the detector. The implemented detector is based on the K-best algorithm. The first one achieves the detection rate requirement with a single processing block running at 231 MHz and the latter one with four blocks in parallel, each running at 247 MHz. Two different detector architectures are implemented. The used FPGA board for uplink implementation is Xilinx Virtex-6 and the implementation has been carried out using Xilinx Vivado high level synthesis tool. The uplink field-programmable gate array (FPGA) detector implementation is targeted for 4 × 4 antenna system and 64-QAM achieving a detection rate requirement for 20 MHz bandwidth. The downlink detector is based on the selective spanning with fast enumeration algorithm. Each core runs at 277 MHz clock frequency and consumes 55.5–64.0 mW depending on the detector configuration. In TTA detector implementation, the LTE detection rate requirements up to 20 MHz bandwidth and 4 × 4 antenna system with 64-QAM, are achieved by using 1–6 programmable cores in parallel. The downlink implementations are based on the programmable transport triggered architecture (TTA) which provides a flexible and energy efficient architecture template. The downlink transmission is based on the orthogonal frequency division multiplexing, whereas the uplink transmission uses a single-carrier frequency-division multiple access. We summarize our recent state-of-the-art programmable and reconfigurable detector and QR decomposition (QRD) implementations targeting 3G long term evolution (LTE) downlink and uplink requirements.
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